Title :
The Scalable Coherent Interface: scaling to high-performance systems
Author_Institution :
Apple Comput. Inc., Cupertino, CA, USA
Abstract :
With the ANSI/IEEE Std 1596-1992 Scalable Coherent Interface (SCI), a few or many processors can share cached data in a coherent fashion (i.e. their caches are transparent to software). Scalability constrains the protocols to rely on simple request-response protocols, rather than the eavesdrop or 3-party transactions assumed by (unscalable) bus-based systems. The linear nature of the base SCI protocols limits their performance when data is being actively shared by large numbers of processors. To meet these needs, the IEEE P1596.2 working group is currently defining a compatible set of extensions based on distributed binary trees. Scalability includes optionality: simple and/or specialized noncoherent systems are not affected by the costs of coherence protocols.<>
Keywords :
multiprocessing systems; protocols; reconfigurable architectures; standards; system buses; tree data structures; ANSI/IEEE Std 1596-1992; IEEE P1596.2 working group; SCI; Scalable Coherent Interface; cached data sharing; coherence protocols; distributed binary trees; high-performance systems; multiprocessors; noncoherent systems; optionality; request-response protocols; scalability; software transparent caches; Binary trees; Broadcasting; Computer interfaces; Costs; Educational institutions; Product design; Product development; Protocols; Scalability; Standards development;
Conference_Titel :
Compcon Spring '94, Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-5380-9
DOI :
10.1109/CMPCON.1994.282943
