DocumentCode :
171993
Title :
A high throughput K-best detector on FPGA
Author :
Zhiqiang Liu ; JingFei Jiang ; Yong Dou ; Rongchun Li ; Song Guo
Author_Institution :
Sch. of Comput., Nat. Univ. of Defense, Changsha, China
fYear :
2014
fDate :
27-30 May 2014
Firstpage :
92
Lastpage :
96
Abstract :
The multiple-input-multiple-output (MIMO) technique is widely used in modern wireless communication systems because it greatly increases system capacity and improves communication reliability. However, MIMO detection is a challenging task. Sphere detection algorithms are preferred in practice as these can achieve bit error rate performances close to that of the maximum likelihood algorithm. Sphere detection algorithms also offer affordable computational complexity. In this paper, we propose a layer-wise detector framework on the basis of the K-best detection algorithm for 4×4, 16-QAM MIMO systems. The kernel module of the framework is based on the layer-processing module. In this case, we fully pipelined the module with a parallel sorting unit. By using the layer-processing module, we can assemble different detectors with different performances and cost trade-offs. We deployed four detectors with different amounts of layer processing modules. All detectors receive a throughput of over 300 Mbps. The detector with eight layer modules was fully pipelined. This detector generates one result per clock cycle and obtains a throughput of up to 2.68 Gbps at 168 MHz.
Keywords :
MIMO communication; computational complexity; error statistics; field programmable gate arrays; maximum likelihood detection; quadrature amplitude modulation; telecommunication network reliability; 16-QAM MIMO systems; FPGA; MIMO detection; MIMO technique; bit error rate; communication reliability; computational complexity; frequency 168 MHz; high throughput K-best detector; kernel module; layer-processing module; layer-wise detector framework; maximum likelihood algorithm; modern wireless communication systems; multiple-input-multiple-output technique; parallel sorting unit; sphere detection; Algorithm design and analysis; Clocks; Detectors; Field programmable gate arrays; MIMO; Sorting; Throughput; Bitonic Sort; FPGA; K-best; MIMO; Odd-Even Mergesort; high-throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications and Networking (BlackSeaCom), 2014 IEEE International Black Sea Conference on
Conference_Location :
Odessa
Type :
conf
DOI :
10.1109/BlackSeaCom.2014.6849012
Filename :
6849012
Link To Document :
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