Breakdown Voltage Analysis of SOI LDMOS with Step Buried Oxide

Author

Tao, An ; Yong, Gao

Author_Institution

Xi´´an Univ. of Technol., Xi´´an

fYear

2007

Abstract

On the basis of analyzing SOI LDMOS structure with step buried oxide, the modulation effect of SOI LDMOS step buried field plate on surface electric field of drift region is analyzed, according to modulation theory of field plate on surface electric field. Besides, the effects of step buried oxide thickness and step number on breakdown voltage are also simulated and optimized by ISE. When buried oxide step number is 3 and step thickness is in the range of 0.8 mum -1.2 mum , surface electric field distribution is nearly uniform, breakdown point moves into body form surface, and breakdown voltage of SBOSOI is improved by 30%, compared to conventional SOI device, which provides a practical application conclusion for the design of SOI LDMOS device.

Keywords

MOS integrated circuits; buried layers; electric fields; semiconductor device breakdown; silicon-on-insulator; SOI LDMOS; breakdown point; breakdown voltage analysis; drift region; modulation effect; size 0.8 mum to 1.2 mum; step buried oxide; surface electric field; Breakdown voltage; Dielectrics and electrical insulation; Electric variables measurement; Energy consumption; Etching; Instruments; Latches; Microelectronics; Silicon on insulator technology; Soil measurements; Breakdown Voltage; SOI; electric field modulation; step buried oxide;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Measurement and Instruments, 2007. ICEMI '07. 8th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4244-1136-8

Electronic_ISBN

978-1-4244-1136-8

Type

conf

DOI

10.1109/ICEMI.2007.4350551

Filename

4350551