Papyrus: a history-based VLSI design process management system

This paper describes the design and implementation of a VLSI design process management system called Papyrus, which is built upon a history-based design process model that supports both routine and exploratory VLSI design processes. Emphasis of this paper is put on the descriptions of Papyrus´s basic data models, design decisions, and implementation details. The operational prototype features a transparent dynamic load balancing scheme to exploit the computation power of networked workstations, an atomicity-guarantee mechanism to preserve the high-level abstraction of the design task construct, an interactive design-history manipulation facility, and a set of storage management techniques to reduce the storage overhead entailed by the single assignment update semantics, which is crucial to the support of the so-called rework mechanism. This system also embodies an innovative history-based meta-data inference scheme that automates many previously user-responsible design data management functions