DocumentCode
1721026
Title
Hardware-efficient turbo coding
Author
Noras, James M.
Author_Institution
Dept. of Electr. & Electron. Eng., Bradford Univ., UK
fYear
1999
fDate
6/21/1905 12:00:00 AM
Abstract
By analogy with the cryptographic procedure of stream-ciphering, it is proposed that the weights of the outputs of the encoders used in turbo coding can be controlled, with their resulting combined weights increased. One method of doing this is to combine by means of an XOR gate a binary stream of suitable data with the input to one encoder. The extra effort in decoding is merely to repeat the XOR operation with the same set of data. Some results are given for a simple model system. Evidently this method requires little additional hardware, while potentially simplifying the coding process
Keywords
turbo codes; XOR gate; binary stream; cryptographic procedure; decoding; encoders; hardware-efficient turbo coding; interleaver; stream-ciphering;
fLanguage
English
Publisher
iet
Conference_Titel
Turbo Codes in Digital Broadcasting - Could It Double Capacity? (Ref. No. 1999/165), IEE Colloquium on
Conference_Location
London
Type
conf
DOI
10.1049/ic:19990798
Filename
829883
Link To Document