DocumentCode :
1721710
Title :
Ordered ternary decision diagrams and the multivalued compiled simulation of unmapped logic
Author :
Jennings, Glenn ; Isaksson, Joachim ; Lindgren, Per
Author_Institution :
Div. of Comput. Eng., Lulea Inst. of Technol., Sweden
fYear :
1994
Firstpage :
99
Lastpage :
105
Abstract :
We describe a method for generating logic simulation code which correctly responds to any number of undefined logic values at the code inputs. The method is based on our development of the ordered ternary decision diagram, itself based on Kleenean ternary logic, which explicitly and correctly manages the unknown logic value `U´ in addition to the `1´ and `0´ of conventional OBDDs. We describe the OTDD and how to implement its reduction, application, and restriction operations. This method avoids expensive technology mapping, producing highly efficient `U´-correct compiled logic simulation code in seconds rather than in hours. Our experiments toward confirming the validity of the method are reported
Keywords :
automatic programming; circuit analysis computing; diagrams; digital simulation; logic CAD; ternary logic; Kleenean ternary logic; application; code inputs; compiled logic simulation code; logic circuit design; logic simulation code generation; multivalued compiled simulation; ordered ternary decision diagram; reduction; restriction; undefined logic values; unmapped logic simulation; Circuit simulation; Computational modeling; Computer simulation; Design methodology; Digital systems; Discrete event simulation; Logic design; Logic testing; Multivalued logic; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Simulation Symposium, 1994., 27th Annual
Conference_Location :
La Jolla, CA
Print_ISBN :
0-8186-5620-4
Type :
conf
DOI :
10.1109/SIMSYM.1994.283108
Filename :
283108
Link To Document :
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