DocumentCode
1721799
Title
Tolerance maximisation in fault diagnosis of analogue electronic circuits
Author
Chruszczyk, Lukas ; Grzechca, Damian
Author_Institution
Fac. of Autom. Control, Electron. & Comput. Sci., Silesian Univ. of Technol., Gliwice, Poland
fYear
2011
Firstpage
881
Lastpage
884
Abstract
This article presents maximisation of components tolerance together with finding optimal frequency of a periodic excitation in fault diagnosis of analogue electronic circuits. Additionally classical two-stage “detection → location” diagnosis sequence is merged into single step in order to reduce test time. Presented optimisation problems are solved by means of a genetic algorithm.
Keywords
analogue circuits; fault diagnosis; genetic algorithms; analogue electronic circuits; components tolerance; diagnosis sequence; fault diagnosis; genetic algorithm; periodic excitation; tolerance maximisation; Electrical fault detection; Fault detection; Fault location; Genetic algorithms; Optimization; analogue circuits; catastrophic fault; component tolerance; fault detection; fault diagnosis; fault location; genetic algorithm; single fault; test time reduction;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuit Theory and Design (ECCTD), 2011 20th European Conference on
Conference_Location
Linkoping
Print_ISBN
978-1-4577-0617-2
Electronic_ISBN
978-1-4577-0616-5
Type
conf
DOI
10.1109/ECCTD.2011.6043817
Filename
6043817
Link To Document