Title :
Parallel simulation of heterogeneous arithmetic units networks and high precision dot products
Author :
Fiallos Aguilar, M. ; Duprat, J.
Author_Institution :
Lab. LIP, Ecole Normale Superieure de Lyon, France
Abstract :
In this paper we deal with a new high precision computation of the dot product. The key idea is to use hundreds of digit-serial arithmetic units or operators that allow a “massive” digit-level pipelining. Parallel discrete-event simulations performed on a memory-distributed massively parallel computer show that with a limited number of arithmetic units, the computation of dot product when performed using a “classical” algorithmic technique (i.e. serial cumulative multiplications) is almost as fast as the case where an “optimal” divide-and-conquer algorithmic technique is used. Interconnection networks for both algorithmic techniques are considered
Keywords :
digital arithmetic; discrete event simulation; distributed memory systems; parallel processing; vectors; virtual machines; MasPar MP-1; classical algorithmic technique; digit-level pipelining; digit-serial arithmetic units; divide-and-conquer algorithmic technique; heterogeneous arithmetic units networks; high precision computation; high precision dot products; interconnection networks; memory-distributed massively parallel computer; parallel discrete-event simulations; parallel simulation; serial cumulative multiplications; Application software; Computer errors; Computer networks; Concurrent computing; Digital arithmetic; Discrete event simulation; Distributed computing; Floating-point arithmetic; Pipeline processing; US Department of Transportation;
Conference_Titel :
Simulation Symposium, 1994., 27th Annual
Conference_Location :
La Jolla, CA
Print_ISBN :
0-8186-5620-4
DOI :
10.1109/SIMSYM.1994.283117