Test structures to measure the heat capacity of CMOS layer sandwiches

We report novel thermal characterization microstructures to measure the heat capacity c of CMOS IC layer sandwiches. This parameter is relevant, e.g., for the dynamic response of thermal CMOS microtransducers. The test structures were fabricated using the commercial 2 μm low voltage CMOS process of EM Microelectronic Marin, Switzerland, followed by maskless micromachining. At 300 K, volumetric heat capacities of 1.74±0.13×10⁶ Jm^-3 K^-1 and 2.23±1.87× 10⁶ Jm^-3 K^-1 for the sandwich of CMOS dielectrics and for the lower CMOS metal, respectively, were obtained