• DocumentCode
    1722668
  • Title

    Deep-Submicron MOS Transistor Matching: A Case Study

  • Author

    Dimitrov, Dimitar P.

  • Author_Institution
    Melexis-Bulgaria Ltd., Sofia
  • fYear
    2008
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This article sets out to evaluate the MOS transistor mismatch in a standard 0.18 mum CMOS technology. It compares different methods for extracting MOS transistor matching parameters, and analyzes the drain current matching in detail. Test results are presented and analyzed.
  • Keywords
    CMOS integrated circuits; transistor circuits; CMOS technology; deep-submicron MOS transistor matching; drain current matching; size 0.18 mum; CMOS process; CMOS technology; Electronic circuits; MOSFETs; Predictive models; Production; Semiconductor device manufacture; Semiconductor devices; Testing; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on
  • Conference_Location
    Bratislava
  • Print_ISBN
    978-1-4244-2276-0
  • Electronic_ISBN
    978-1-4244-2277-7
  • Type

    conf

  • DOI
    10.1109/DDECS.2008.4538744
  • Filename
    4538744
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1722668