Title :
Total dose testing of 10-bit low voltage differential signal (LVDS) serializer and deserializer
Author :
Hamilton, Brett J. ; Turflinger, Thomas L.
Author_Institution :
Technol. Dev. Branch, NAVSEA Crane, IN, USA
fDate :
6/23/1905 12:00:00 AM
Abstract :
Commercial deep submicron (< 0.25 micron) CMOS technology exhibits excellent total dose hardness. National Semiconductor LVDS serializer and deserializer circuits, manufactured in this process, were tested to over 115 krd(Si) and 65 krd(Si) respectively, without failure. Testing proved to challenge traditional test techniques, as these parts ran at parallel data rates up to 40 MHz
Keywords :
CMOS integrated circuits; data communication equipment; integrated circuit testing; low-power electronics; radiation hardening (electronics); 0.25 micron; 10-bit LVDS deserializer; 10-bit LVDS serializer; National Semiconductor; commercial deep submicron CMOS technology; low voltage differential signal circuits; parallel data rates; total dose hardness; total dose testing; CMOS technology; Cables; Circuit testing; Clocks; Cranes; Low voltage; Phase locked loops; Semiconductor device manufacture; Software testing; System testing;
Conference_Titel :
Radiation Effects Data Workshop, 2001 IEEE
Conference_Location :
Vancouver, BC
Print_ISBN :
0-7803-7199-2
DOI :
10.1109/REDW.2001.960474
