Title :
A Spread-Spectrum Clock Generator Using Fractional-N PLL Controlled Delta-Sigma Modulator for Serial-ATA III
Author :
Cheng, Kuo-Hsing ; Hung, Cheng-Liang ; Chang, Chih-Hsien ; Lo, Yu-Lung ; Yang, Wei-Bin ; Miaw, Jiunn-Way
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Taoyuan
Abstract :
In this paper, a 6GHz spread-spectrum clock generator (SSCG) for Serial AT Attachment Generations 3 (SATA-III) is presented. By utilizing frequency modulation which employs digital MASH delta-sigma modulator and 33KHz triangular profile address generator, the SSCG achieves an output clock of 6GHz and 5000ppm down spread with a triangular waveform. The SSCG was designed based on TSMC 0.13μm 1p8m CMOS process. The power dissipation is 48mW under a 1.2V supply voltage. The peak-to-peak jitter of non spread-spectrum clock is 8ps, and the EMI reduction is 15dB with normal frequency spread modulation from 6GHz to 5.97GHz.
Keywords :
CMOS integrated circuits; clocks; delta-sigma modulation; jitter; microwave generation; modulators; CMOS process; EMI reduction; controlled delta-sigma modulator; digital MASH delta-sigma modulator; frequency 33 kHz; frequency 5.97 GHz to 6 GHz; frequency modulation; frequency spread modulation; peak-to-peak jitter; power 48 mW; power dissipation; size 0.13 mum; spread-spectrum clock generator; time 8 ps; triangular profile address generator; triangular waveform; voltage 1.2 V; CMOS process; Clocks; Delta modulation; Digital modulation; Frequency modulation; Multi-stage noise shaping; Phase locked loops; Power dissipation; Spread spectrum communication; Voltage;
Conference_Titel :
Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on
Conference_Location :
Bratislava
Print_ISBN :
978-1-4244-2276-0
Electronic_ISBN :
978-1-4244-2277-7
DOI :
10.1109/DDECS.2008.4538758
