Title :
Rapid Prototyping of NoC Architectures from a SystemC Specification
Author :
Deniziak, Stanislaw ; Tomaszewski, Robert
Author_Institution :
Dept. of Comput. Eng., Cracow Univ. of Technol., Cracow
Abstract :
This work presents a methodology for mapping of a SystemC specification onto a given Network-on-Chip (NoC) architecture, for the purpose of FPGA prototyping. A communication protocol and routing tables are generated automatically by using inter-module communication analysis. For each processor in the target architecture, assigned SystemC processes are converted into C++ programs, where all communication method calls are replaced with sending/receiving messages to/from the network interface (NI) process. For each module implemented in hardware a VHDL code of the NI is generated. NIs convert transmitted data into/from network packets according to the communication protocol. Presented embedded HTTP server example substantiates the benefits of the methodology.
Keywords :
C++ language; field programmable gate arrays; hardware description languages; network-on-chip; C++ programs; FPGA prototyping; NoC architectures; SystemC specification; VHDL code; communication protocol; embedded HTTP server; inter-module communication analysis; network-on-chip architecture; rapid prototyping; target architecture; Computer architecture; Field programmable gate arrays; Hardware; Network interfaces; Network synthesis; Network topology; Network-on-a-chip; Protocols; Prototypes; Virtual prototyping;
Conference_Titel :
Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on
Conference_Location :
Bratislava
Print_ISBN :
978-1-4244-2276-0
Electronic_ISBN :
978-1-4244-2277-7
DOI :
10.1109/DDECS.2008.4538765