Title :
Error feedback based noise shaping in a double sampled ADC
Author :
Sarma, Vineeth ; Sahoo, Bibhudatta
Author_Institution :
Dept. of Electron. & Commun. Eng., Amrita Univ., Amritapuri, India
Abstract :
A first order error feedback based noise shaping in a double sampled ADC is proposed. This topology is ideal for nanometer CMOS technology, as it obviates the need for high-gain and high output-swing op amps and fast-settling, power-hungry, and noisy reference buffers. Using a one stage op amp with a gain of 70 (i.e. 37 dB) and output swing of ±75 mV , this topology, realized in GPDK 90-nm CMOS technology, achieves an SNDR of 60 dB operating at 1 GHz (effective sample rate of 2 GHz due to double sampling) with an OSR of 32.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; feedback; network topology; operational amplifiers; GPDK CMOS technology; OSR; SNDR; double sampled ADC; first order error feedback based noise shaping; high output-swing op amps; high-gain op amps; nanometer CMOS technology; noisy reference buffers; power-hungry; CMOS integrated circuits; Capacitors; Modulation; Noise; Operational amplifiers; Quantization; Topology;
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2012 IEEE 10th International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4673-0857-1
Electronic_ISBN :
978-1-4673-0858-8
DOI :
10.1109/NEWCAS.2012.6329003
