Calculating the fault coverage for dual neighboring faults using single stuck-at fault patterns

Chip structures shrink rapidly, but the particles causing the defects do not shrink in the same degree, thus multiple faults are more and more frequent in today´s deep sub-micron chips. Scan test patterns are usually calculated to detect single stuck-at faults, and they detect also ´nearly all´ multiple faults if at least one of the faults is detectable as a single fault. ´Nearly all´ implies that there are exceptions, and indeed sometimes two single-stuck-at faults can only be detected when occurring alone, but not if they occur together. This phenomenon is called fault masking and has been extensively discussed in the literature, but only in considering each pair of possible faults having the same likelihood to occur. In reality, however, pairs of neighboring faults have a much higher likelihood than pairs of distant faults. Using layout and pattern data of a commercial circuit, the extent of fault masking is calculated both for neighboring faults, and for distant faults.