DocumentCode
1724246
Title
Detailed routing with integrated static timing analysis applying simulated annealing
Author
Panitz, Philipp ; Olbrich, Markus ; Barke, Erich
Author_Institution
Inst. of Microelectron. Syst., Hannover Univ., Germany
fYear
2005
Firstpage
387
Lastpage
390
Abstract
The consideration of wiring delays becomes increasingly important. In this paper static timing analysis is incorporated into detailed routing for the first time. The approach applies the placement of routing patterns using simulated annealing. As a result, our router guarantees the fulfillment of timing constraints by construction.
Keywords
delays; integrated circuit interconnections; integrated circuit layout; network routing; simulated annealing; timing; detailed routing; integrated static timing analysis; routing patterns; simulated annealing; timing constraints; wiring delays; Analytical models; Costs; Delay; Routing; Runtime; Simulated annealing; Stochastic processes; Temperature; Timing; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
IEEE-NEWCAS Conference, 2005. The 3rd International
Print_ISBN
0-7803-8934-4
Type
conf
DOI
10.1109/NEWCAS.2005.1496696
Filename
1496696
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