Title :
Scalability study of ultra-thin-body SOI-MOSFETs using full-band and quantum mechanical based device simulation
Author :
Takeda, Hiroshi ; Takeuchi, Kiyoshi ; Hayashi, Yoshihiro
Author_Institution :
LSI Fundamental Res. Lab., NEC Electron. Corp., Sagamihara, Japan
Abstract :
Scaling limit of ultra-thin-body SOI-MOSFETs is quantitatively evaluated using device simulation, which takes into account full-band structure, quantum mechanical effects and quasi-ballistic effects. It was found that the SOI thickness (tSOI) cannot be decreased less than 3nm due to severe surface roughness (tSOI fluctuation) scattering. Further considering substrate bias optimization for both On- and Off-performance, the minimum attainable channel length is clarified.
Keywords :
MOSFET; silicon-on-insulator; SOI thickness; device simulation; full-band structure; quantum mechanical effects; quasi-ballistic effects; substrate bias optimization; surface roughness; ultra-thin-body SOI-MOSFET; Fluctuations; Logic gates; Rough surfaces; Scattering; Strain; Substrates; Surface roughness;
Conference_Titel :
VLSI Technology (VLSIT), 2010 Symposium on
Conference_Location :
Honolulu
Print_ISBN :
978-1-4244-5451-8
Electronic_ISBN :
978-1-4244-5450-1
DOI :
10.1109/VLSIT.2010.5556117
