ECG signal de-noising on node based a dedicated FFT circuit

Electromagnetic Interference induced by 50/60 Hz power line is a major problem in physiological measurements. Conventional methods using embedded software are time-consuming and need great amount of calculation. In this paper we developed a digital filter based on hardware acceleration. The design was implemented with ASIC incorporated a reconfigurable Fast Fourier Transform (FFT) unit, a licensed ARM7TDMI IP hardcore and several peripheral IP blocks. Comparing with other methods, this design achieved precision results in the low frequency range, which fit well for physiological signals. Our method is remarkably faster than conventional methods. The simulation and application results validate the accuracy and efficiency of the proposed method.