ESD reliability building in 0.25 μm 60-V p-channel LDMOS DUTs with different embedded SCRs

In order to effectively improve the ESD capability of a p-channel lateral-diffused MOS device, we aimed at the anti-ESD protection capability of the different layout types in the drain-side for the 0.25-μm 60-V high voltage p-channel LDMOS devices. Here, a drain-side pnp arranged-type in a pLDMOS-SCR parasitic structure is used to investigate the layout placement effect. At first, the layout type of P⁺ region is continuous extended into the drain-side. Secondly, the layout type of P⁺ region are changed by some discrete-distributed areas into the drain-side. From TLP experimental results, we can find that the layout type of discrete-distributed type in the drain-side have a better ESD capability than the continuous extended type, then the secondary breakdown current (I_t2) value can be achieved above 7 A. However, the holding voltage (V_h) of the continuous extended type shows an escalating trend, so it can be having higher latch-up immunity.