Highly accurate product-level aging monitoring in 40nm CMOS

Author

Hofmann, K. ; Reisinger, H. ; Ermisch, K. ; Schlünder, C. ; Gustin, W. ; Pompl, T. ; Georgakos, G. ; Arnim, K.v. ; Hatsch, J. ; Kodytek, T. ; Baumann, T. ; Pacha, C.

Author_Institution

Infineon Technol., Munich, Germany

fYear

2010

Firstpage

27

Lastpage

28

Abstract

A product-level aging monitor replicating a 40nm CMOS ARM1176 critical path is presented. The monitor enables a separation of the dominating negative bias instability (NBTI) stress, including speed recovery, and the switching-activity dependent hot carrier stress (HCS). The comprehensive analysis comprises transistor and circuit level measurements as well as simulations. The monitor results demonstrate that the overall circuit performance degradation, even at high frequencies and large switching activities, is 2% for wireless-typical operating conditions.

Keywords

CMOS integrated circuits; integrated circuit reliability; CMOS ARM1176 critical path; negative bias instability stress; product-level aging monitoring; size 40 nm; speed recovery; switching-activity dependent hot carrier stress; Aging; Degradation; Frequency measurement; Monitoring; Stress; Stress measurement; Temperature measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology (VLSIT), 2010 Symposium on

Conference_Location

Honolulu

Print_ISBN

978-1-4244-5451-8

Electronic_ISBN

978-1-4244-5450-1

Type

conf

DOI

10.1109/VLSIT.2010.5556134

Filename

5556134