DocumentCode :
1725631
Title :
A hardware architecture for the generation of ωNAF random integers
Author :
Dupont, Louis ; Roy, Sébastien ; Chouinard, Jean-Yves
Author_Institution :
Dept. of Electr. & Comput. Eng., Laval Univ., Sainte-Foy, Que., Canada
fYear :
2005
Firstpage :
99
Lastpage :
102
Abstract :
Width-ω non-adjacent form (ωNAF) representation is commonly used in elliptic curve cryptography to speed up multiplication. However, conversion of an integer to its ωNAF representation can be quite costly, especially from a hardware point of view. This paper proposes a method to generate an integer directly in its ωNAF representation. A hardware implementation is also proposed.
Keywords :
cryptography; digital arithmetic; random number generation; ω nonadjacent form; ωNAF representation; elliptic curve cryptography; hardware architecture; random integers generation; Circuits; Computational efficiency; Computer architecture; Costs; Electronic mail; Elliptic curve cryptography; Elliptic curves; Hardware; Public key cryptography;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
IEEE-NEWCAS Conference, 2005. The 3rd International
Print_ISBN :
0-7803-8934-4
Type :
conf
DOI :
10.1109/NEWCAS.2005.1496750
Filename :
1496750
Link To Document :
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