Abstract :
The following topics are dealt with: 3D interconnections; embedded and wafer level packaging; lead free solder; metamaterials and integrated components; high-speed interconnects; emerging packaging; 3D integration; electromigration; underfills, mold compounds, and dielectrics; thermomechanical reliability; electrical modeling and measurements; assembly challenges and solutions; TSV - interposers and applications; flip chip and advanced substrates; adhesives and adhesion; solder material characterization; thermomechanical modeling; board level optical interconnects; interposers; flip-chip solder joint reliability; manufacturing challenges of wafer thinning and flip chip processing; components - RF and bio applications; fracture and warpage in packages; manufacturing aspects of 3D/TSV; TSV design and modeling; novel materials and processing; characterization methods of interfaces and interconnections; biosensing; embedded GHz systems packaging; emerging materials and processing for 3D; 3D package reliability; advanced wirebonds; novel packaging technologies; microfluidics and MEMs; and high power LEDs and lasers.
Keywords :
adhesion; adhesives; biosensors; dielectric materials; electromigration; flip-chip devices; fracture; integrated circuit interconnections; lasers; light emitting diodes; metamaterials; microfluidics; optical interconnections; reliability; solders; thermomechanical treatment; three-dimensional integrated circuits; wafer level packaging; 3D integration; 3D interconnections; 3D package reliability; MEMS; TSV design; TSV modeling; adhesion; adhesives; advanced substrates; biosensing; board level optical interconnects; dielectrics; electrical measurements; electrical modeling; electromigration; embedded packaging; flip chip; flip-chip solder joint reliability; fracture; high power LED; high-speed interconnects; integrated components; interposers; lasers; lead free solder; metamaterials; microfluidics; mold compounds; solder material; thermomechanical modeling; thermomechanical reliability; underfills; wafer level packaging; wafer thinning; warpage; wirebonds;
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location :
Lake Buena Vista, FL
Print_ISBN :
978-1-61284-497-8
Electronic_ISBN :
0569-5503
DOI :
10.1109/ECTC.2011.5898473
