DocumentCode
1726202
Title
Simulation of hot-carrier reliability in MOS integrated circuits
Author
Wong, H. ; Poon, M.C.
Author_Institution
Dept. of Electron. Eng., City Univ. of Hong Kong, Kowloon, Hong Kong
Volume
2
fYear
1997
Firstpage
625
Abstract
A software package interfacing to SPICE is developed based on several new or revised models for hot electron studies. For substrate current generation, we present a new model for the characterizing the width of impact ionization region which is channel length and bias dependent. For modeling the hot electron injection into the gate oxide, a revised thermionic emission model is developed. For hot electron induced degradation, previously developed generation-trapping models are used. Good correlations with the experimental and simulation results are obtained. The program can be used to analyze the reliability and the biasing stability of MOS circuits
Keywords
MOS integrated circuits; SPICE; hot carriers; impact ionisation; integrated circuit reliability; thermionic electron emission; MOS integrated circuit; SPICE; biasing stability; gate oxide; generation-trapping model; hot carrier reliability; hot electron injection; impact ionization; simulation; software package; substrate current generation; thermionic emission model; Character generation; Circuit simulation; Hot carriers; Impact ionization; Integrated circuit reliability; MOS integrated circuits; SPICE; Secondary generated hot electron injection; Software packages; Substrate hot electron injection;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 1997. Proceedings., 1997 21st International Conference on
Conference_Location
Nis
Print_ISBN
0-7803-3664-X
Type
conf
DOI
10.1109/ICMEL.1997.632919
Filename
632919
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