Title :
SJ-FINFET: A New Low Voltage Lateral Superjunction MOSFET
Author :
Onishi, Y. ; Wang, H. ; Xu, H.P.E. ; Ng, W.T. ; Wu, R. ; Sin, J.K.O.
Author_Institution :
Electron Device Lab., Fuji Electr. Device Tech. Co. Ltd., Matsumoto
Abstract :
This paper proposes a new SOI lateral superjunction (SJ) power transistor structure, SJ-FINFET, to address the requirement for low voltage lateral MOSFETs with low specific on-resistance (Ron,sp). The SJ-FINFET consists of a 3D trench gate and a SJ drift region (the fin) to reduce both the channel resistance and the drift region resistance. The SJ-FINFET with n/p-drift region pillar thickness (SOI layer thickness, Tepi) of 4 mum was simulated and found to have a Ron,sp of 0.18 mOmegaldrcm2. This is 21% lower than the well-known silicon limit at a breakdown voltage (BVdss) of 68 V.
Keywords :
MOSFET; electric resistance; power transistors; silicon-on-insulator; SOI lateral superjunction power transistor; channel resistance; drift region resistance; low voltage lateral MOSFET; trench gate; Electron devices; Laboratories; Low voltage; MOSFET circuits; Power MOSFET; Power engineering and energy; Power engineering computing; Power semiconductor devices; Silicon compounds; Surface resistance;
Conference_Titel :
Power Semiconductor Devices and IC's, 2008. ISPSD '08. 20th International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4244-1532-8
Electronic_ISBN :
978-1-4244-1533-5
DOI :
10.1109/ISPSD.2008.4538910