Title :
700V Lateral DMOS with New Source Fingertip Design
Author :
Lee, S.H. ; Jeon, C.K. ; Moon, J.W. ; Choi, Y.C.
Author_Institution :
Fairchild Korea Semicond., Pucheon
Abstract :
For decades of years, the most advanced commercial LDMOS was made by double RESURF technique using p-type Held shaping layer until dual current path LDMOS which has triple RESURF structure. The specific on resistance of LDMOS was reduced to about 60% comparing to conventional LDMOS by using buried p-type field shaping layer which make it possible to get triple RESURF structure for LDMOS. The crucial point to get low specific on resistance of LDMOS is also source fingertip design because large source radius to avoid electric field concentration causes poor specific on-resistance characteristics. This paper presents high voltage LDMOS with two types of RESURF structure which has different charge balances to get lower specific on-resistance and high sustaining voltage at the same time.
Keywords :
MOS integrated circuits; electric resistance; power integrated circuits; RESURF structure; high voltage LDMOS; lateral DMOS; resistance; source fingertip design; voltage 700 V; Breakdown voltage; Diodes; Electric breakdown; Electric resistance; Moon; Power engineering and energy; Power semiconductor devices; Region 6; Semiconductor devices; Surface resistance;
Conference_Titel :
Power Semiconductor Devices and IC's, 2008. ISPSD '08. 20th International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4244-1532-8
Electronic_ISBN :
978-1-4244-1533-5
DOI :
10.1109/ISPSD.2008.4538918