DocumentCode :
1726766
Title :
32nm 3-bit 32Gb NAND Flash Memory with DPT (d̲ouble p̲atterning t̲echnology) process for mass production
Author :
Park, Bong Tae ; Song, Jai Hyuk ; Cho, Eun Suk ; Hong, Seung Wan ; Kim, Jae Youn ; Choi, Yong Ju ; Kim, Yong Seok ; Lee, Seung Jun ; Lee, Chi Kyoung ; Kang, Dae Woong ; Lee, Dong Jun ; Kim, Byoung Taek ; Choi, Yong Joon ; Lee, Woon Kyung ; Choi, Jeong-Hyu
Author_Institution :
Flash Process Archit. Team, Samsung Electron. Co., Yongin, South Korea
fYear :
2010
Firstpage :
125
Lastpage :
126
Abstract :
32nm 3-bit 32Gb NAND Flash Memory for mass production has been successfully developed for the first time. To shorten the development time and lower the cost, one side double patterning technology in a gate direction and the minimum number of spare blocks have been adopted. Additionally, considering endurance and data retention of cell characteristics, the optimal gate and active lengths are fixed in a stage of device design.
Keywords :
NAND circuits; flash memories; mass production; NAND flash memory; active length; data retention; device design; double patterning technology; gate direction; gate length; mass production; memory size 32 GByte; size 32 nm; spare blocks; Computer architecture; Doping; Flash memory; Logic gates; Mass production; Semiconductor device reliability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology (VLSIT), 2010 Symposium on
Conference_Location :
Honolulu
Print_ISBN :
978-1-4244-5451-8
Electronic_ISBN :
978-1-4244-5450-1
Type :
conf
DOI :
10.1109/VLSIT.2010.5556196
Filename :
5556196
Link To Document :
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