Title :
The Next Generation of HV-IGBTs with Low Loss and High SOA Capability
Author :
Nakamura, Katsumi ; Hatori, Kenji ; Hisamoto, Yoshiaki ; Sakamoto, Shunsuke ; Harada, Tatsuo ; Hatade, Kazunari
Author_Institution :
Power Device Works, Mitsubishi Electr. Corp., Fukuoka
Abstract :
In order to improve the total performance of the 3300~6500 V high-voltage (HV) IGBT, a double combination concept is adopted: an "enhanced planar gate cell" for the emitter side and a "light punch-through (LPT)" structure for the collector side. The LPT-Planar IGBT demonstrates lower on-state voltage (VCE(sat)), lower turn-off loss (EOFF) and lower junction leakage current (>398 K) with higher safety operation area (SOA) capability than that of conventional Planar IGBT. In addition, this device achieves a widely operating junction temperature (i.e. 218 ~ 423 K) of the HV-IGBT without the snap-back phenomenon (<298 K) and thermal destruction (>398 K). From the viewpoint of low overall loss, high SOA capability and widely operating junction temperature, the LPT-Planar IGBT is a promising candidate for HV-IGBT.
Keywords :
leakage currents; HV-IGBT; LPT-Planar IGBT; emitter side; enhanced planar gate cell; high-voltage IGBT; junction leakage current; light punch-through structure; safety operation area; snap-back phenomenon; voltage 3300 V to 6500 V; Charge carrier lifetime; Diodes; Electronic mail; Insulated gate bipolar transistors; Performance loss; Power engineering and energy; Power semiconductor devices; Semiconductor optical amplifiers; Temperature; Voltage;
Conference_Titel :
Power Semiconductor Devices and IC's, 2008. ISPSD '08. 20th International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4244-1532-8
Electronic_ISBN :
978-1-4244-1533-5
DOI :
10.1109/ISPSD.2008.4538919
