Title :
JFET Depletion in SuperJunction Devices
Author :
Disney, Don ; Dolny, Gary
Author_Institution :
Adv. Analogic Technol., Inc., Santa Clara, CA
Abstract :
SuperJunction theory predicts that specific on- resistance improves as the widths of the N- and P-type regions in the drift region are reduced. In this paper, it is shown that there is a practical limit to improving on-resistance by shrinking these widths, due to JFET depletion of the conducting regions. An analytic model is developed to calculate the optimum drift region width for super junction devices, and this model is verified by simulations. Specific examples of optimized drift region widths for superjunction devices with various levels of drift region charge and applied drain voltage are provided.
Keywords :
junction gate field effect transistors; p-n junctions; drain voltage; junction gate field effect transistors; superjunction device; Analog integrated circuits; Analytical models; Breakdown voltage; Electric breakdown; Fabrication; P-n junctions; Power semiconductor devices; Semiconductor process modeling; Silicon; Technological innovation;
Conference_Titel :
Power Semiconductor Devices and IC's, 2008. ISPSD '08. 20th International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4244-1532-8
Electronic_ISBN :
978-1-4244-1533-5
DOI :
10.1109/ISPSD.2008.4538922
