Differentiating impacts of hole trapping vs. interface states on TDDB reduction in thin oxide gated diode structures

Author

Tang, Yuan ; Chang, Chi ; Haddad, Sameer ; Wang, Arthur ; Lien, Jih

Author_Institution

Adv. Micro Devices, Sunnyvale, CA, USA

fYear

1993

Firstpage

262

Lastpage

271

Abstract

Prestress induced reduction of time dependent dielectric breakdown (TDDB) in MOSFETs is considered. In this study, different prestress conditions using a gated diode structure were designed. Each stress condition is set to generate hole trapping in the thin gate oxide and/or interface states to a different extent, thus allowing differentiation of their effects on TDDB. The experimental data suggest that TDDB reduction is strongly correlated with Si/SiO/sub 2/ interface damage created by hot carriers, while stress induced hole trapping alone does not appear to directly contribute to TDDB reduction.<>

Keywords

electric breakdown of solids; hole traps; hot carriers; insulated gate field effect transistors; interface electron states; semiconductor device testing; MOSFETs; Si-SiO/sub 2/ interface damage; TDDB reduction; hole trapping; hot carriers; interface states; prestress induced reduction; thin oxide gated diode structures; time dependent dielectric breakdown; Avalanche breakdown; Charge carrier processes; Current measurement; Dielectric breakdown; Diodes; Electron traps; Hot carriers; Interface states; Stress; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 1993. 31st Annual Proceedings., International

Conference_Location

Atlanta, GA, USA

Print_ISBN

0-7803-0782-8

Type

conf

DOI

10.1109/RELPHY.1993.283315

Filename

283315