DocumentCode
1726965
Title
Evaluation of modern gate oxide technologies to process charging
Author
Crook, Dwight ; Domnitei, Mike ; Webb, Mark ; Bonini, John
Author_Institution
Intel Corp., Hillsboro, OR, USA
fYear
1993
Firstpage
255
Lastpage
261
Abstract
A CV/IV walk-out measurement technique that can be used to systematically determine the causes of various gate oxide yield and reliability problems is presented. By simultaneously measuring the effects trapped charge has on the (1) positive IV, (2) negative IV, and (3) CV as a function of charge injected through the oxide, it is possible to determine whether a particular oxide problem is a point defect or uniformly distributed, is a positive or negative trapping center, and has a centroid near the poly or substrate. This measurement technique can also be used to quantify the sensitivity a given gate oxide technology has to process charging. Three types of gate oxide technologies that are commonly used in VLSI manufacturing are evaluated using this technique. The results are compared with those taken by traditional techniques such as JT distributions and antenna structures.<>
Keywords
VLSI; characteristics measurement; circuit reliability; electron traps; integrated circuit technology; point defects; CV/IV walk-out measurement technique; VLSI manufacturing; centroid; gate oxide technologies; point defect; process charging; reliability; trapped charge; trapping center; yield; Annealing; Charge measurement; Current measurement; Human computer interaction; Manufacturing processes; Measurement techniques; Particle measurements; Plasma applications; Thermal degradation; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 1993. 31st Annual Proceedings., International
Conference_Location
Atlanta, GA, USA
Print_ISBN
0-7803-0782-8
Type
conf
DOI
10.1109/RELPHY.1993.283316
Filename
283316
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