ESD Protection of NDMOS in 0.18μm High-Voltage CMOS Technology for Automotive Applications

Author

Steinbeck, L. ; Pröhl, U. ; Frank, M. ; Konrad, A. ; Ellmers, C. ; Uhlig, T.

Author_Institution

X-FAB Dresden GmbH & Co. KG, Dresden

fYear

2008

Firstpage

221

Lastpage

224

Abstract

The snapback trigger voltage of the NDMOS in a 0.18 μm automotive smart power technology is strongly reduced at large gate bias. This behavior of the deep-submicron multi-resurf NDMOS, which makes its ESD protection difficult and limits its electrical safe operating area, and the influence of various device modifications are investigated by TCAD simulation. SCR-based ESD protection schemes for I/O and power supply protection are presented. For supply protection the SCR is modified to increase its holding voltage. The ability to protect the NDMOS at non-zero gate bias is discussed.

Keywords

CMOS integrated circuits; automotive electronics; power system protection; ESD protection; TCAD simulation; automotive smart power technology; deep-submicron multiresurf NDMOS; high-voltage CMOS technology; nonzero gate bias; power supply protection; size 0.18 mum; Automotive applications; Automotive engineering; CMOS technology; Electrostatic discharge; Pins; Power system protection; System testing; Thyristors; Trigger circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and IC's, 2008. ISPSD '08. 20th International Symposium on

Conference_Location

Orlando, FL

Print_ISBN

978-1-4244-1532-8

Electronic_ISBN

978-1-4244-1533-5

Type

conf

DOI

10.1109/ISPSD.2008.4538938

Filename

4538938