Title :
Soft-error-rate improvement in advanced BiCMOS SRAMs
Author :
Burnett, David ; Lage, Craig ; Bormann, Al
Author_Institution :
Motorola Inc., Austin, TX, USA
Abstract :
An improvement in soft-error-rate (SER) achieved by implementing a triple-well structure in a BiCMOS process is discussed. For 4-Mb SRAMs fabricated in a BiCMOS process, an optimized triple-well process improves the accelerated SER (ASER) by over two orders of magnitude without compromising device performance. Diode charge collection and ASER measurements show excellent correlation across several BiCMOS and CMOS processes.<>
Keywords :
BiCMOS integrated circuits; SRAM chips; alpha-particle effects; 4 Mbit; ASER measurements; BiCMOS SRAMs; accelerated SER; device performance; diode charge collection; soft-error-rate; triple-well structure; Acceleration; Area measurement; BiCMOS integrated circuits; CMOS process; Charge measurement; Current measurement; Diodes; Measurement standards; Random access memory; Research and development;
Conference_Titel :
Reliability Physics Symposium, 1993. 31st Annual Proceedings., International
Conference_Location :
Atlanta, GA, USA
Print_ISBN :
0-7803-0782-8
DOI :
10.1109/RELPHY.1993.283330
