Characterization and modeling of BiCMOS logic for low temperature operation

The results of using a closed-form analytic model for the transient response of a BiCMOS inverter to determine bipolar device requirements for acceptable BiCMOS operation at low temperatures are presented. Measurements of bipolar device parameters versus temperature for bipolar devices fabricated in a BiCMOS process are presented and combined with model predictions of gate delay dependence on these key parameters to predict how gate delay varies with temperature. The predictions are compared to BiCMOS ring oscillator measurements over the temperature range of 77 K to 350 K. It is shown that, although BiCMOS gate delay does not substantially increase until far below room temperature, operation of present BiCMOS gates at low temperatures does not yield speed advantages similar to those seen in CMOS gates. However, since this is due to poor bipolar device performance at low temperatures, it is concluded that careful optimization of critical device parameters, such as B_f, for low-temperature operation holds significant promise