DocumentCode
1727444
Title
High performance wafer level underfill material with high filler loading
Author
Katsurayama, Satoru ; Suzuki, Hiroshi ; Nah, Jae-Woong ; Gaynes, Michael ; Feger, Claudius
Author_Institution
Sumitomo Bakelite Co., Ltd., Tochigi, Japan
fYear
2011
Firstpage
370
Lastpage
374
Abstract
A new wafer level underfill material with filler content of 60 weight % was developed for high performance flip chip applications with lead free solder bumps. Systematic optimization of the viscosity behavior led to good spin coat ability even for the material with high filler loading. The material can be applied onto the bumped wafer with high uniformity up to a thickness of 100 μm by spin coating. The thickness variation was less than 5%. Additionally, void reduction in the package was realized by optimizing the curing process. By controlling the viscosity during the post-curing step voids in the package can be eliminated. Finally, the package with the new wafer level underfill material exhibited good reliability including during thermal cycling.
Keywords
curing; flip-chip devices; semiconductor device reliability; solders; viscosity; wafer level packaging; curing process; high filler loading; high performance flip chip application; high performance wafer level underfill material; lead free solder bump; reliability; spin coat ability; systematic optimization; thermal cycling; viscosity behavior; Assembly; Coatings; Flip chip; Reliability; Surface treatment; Viscosity;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location
Lake Buena Vista, FL
ISSN
0569-5503
Print_ISBN
978-1-61284-497-8
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2011.5898540
Filename
5898540
Link To Document