• DocumentCode
    1727749
  • Title

    High-k/Ge p- & n-MISFETs with strontium germanide interlayer for EOT scalable CMIS application

  • Author

    Kamata, Yoshiki ; Ikeda, Keiji ; Kamimuta, Yuuichi ; Tezuka, Tsutomu

  • Author_Institution
    MIRAI-Toshiba, Kawasaki, Japan
  • fYear
    2010
  • Firstpage
    211
  • Lastpage
    212
  • Abstract
    High-k/Ge with strontium germanide interlayer has been applied for both p- and n-MISFETs. The observed Jg-EOT trend in the Ge-MISCAPs exhibits comparable or superior leakage characteristics to that of state-of-the-art HfSiON gate dielectrics on Si down to an EOT of 0.96nm. The drive current of the p-MISFETs increases with the EOT scaling around 1nm without μeff degradation. Furthermore, reasonable Vth values are observed in both p- and n-MISFETs. These results suggest applicability of the SrGex interlayer to high-k/Ge CMISFETs.
  • Keywords
    MISFET; germanium; semiconductor materials; strontium compounds; EOT scalable CMIS application; MISFET; drive current; gate dielectrics; strontium germanide interlayer; Degradation; FETs; High K dielectric materials; International Electron Devices Meeting; Logic gates; Silicon; Strontium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology (VLSIT), 2010 Symposium on
  • Conference_Location
    Honolulu
  • Print_ISBN
    978-1-4244-5451-8
  • Electronic_ISBN
    978-1-4244-5450-1
  • Type

    conf

  • DOI
    10.1109/VLSIT.2010.5556231
  • Filename
    5556231