• DocumentCode
    1727851
  • Title

    New cost-effective integration schemes enabling analog and high-voltage design in advanced CMOS SOC technologies

  • Author

    Benaissa, K. ; Baldwin, G. ; Liu, S. ; Srinivasan, P. ; Hou, F. ; Obradovic, B. ; Yu, S. ; Yang, H. ; McMullan, R. ; Reddy, V. ; Chancellor, C. ; Venkataraman, S. ; Lu, H. ; Dey, S. ; Cirba, C.

  • Author_Institution
    Texas Instrum., Dallas, TX, USA
  • fYear
    2010
  • Firstpage
    221
  • Lastpage
    222
  • Abstract
    We present novel and cost effective integration schemes with high performance analog and high voltage components to enable system-on-chip (SOC) designs in advanced CMOS technologies. The new transistors have superior analog performance compared to the standard logic devices resulting in significant area savings and greater analog functionality. The new high voltage (HV) transistors enable reliable 6V capability with high performance for direct battery connection circuits and other high voltage applications. Additional cost-free components are also provided including fully isolated CMOS; ppoly-pwell capacitors and varactors; and high-gain npn and pnp bipolar transistors. All of these components are implemented in a standard digital process without mask adders like deep nwell (DNWELL), silicide block (SIBLK), or dedicated high voltage (HV) transistor implants that are commonly used in the industry for deep sub-micron SOC implementation.
  • Keywords
    CMOS digital integrated circuits; bipolar transistors; capacitors; system-on-chip; varactors; CMOS SOC technologies; analog design; analog functionality; area savings; cost-effective integration schemes; direct battery connection circuits; high voltage transistors; high-voltage design; npn bipolar transistors; pnp bipolar transistors; ppoly-pwell capacitors; standard digital process; system-on-chip designs; varactors; voltage 6 V; Adders; Capacitors; Implants; Logic gates; Noise; System-on-a-chip; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology (VLSIT), 2010 Symposium on
  • Conference_Location
    Honolulu
  • Print_ISBN
    978-1-4244-5451-8
  • Electronic_ISBN
    978-1-4244-5450-1
  • Type

    conf

  • DOI
    10.1109/VLSIT.2010.5556235
  • Filename
    5556235