Title :
A novel inter-package connection for advanced package-on-package enabling
Author :
Cheah, Bok Eng ; Kong, Jackson ; Periaman, Shanggar ; Ooi, Kooi Chi
Author_Institution :
Intel Microelectron. (M) Sdn Bhd, Bayan Lepas, Malaysia
Abstract :
This paper presents a novel enabling technique exploiting interposer approach such as silicon and package interposer in the area of package-on-package (PoP) technology to achieve ultra small form factor packaging solution. The electrical performance of such interconnect innovation is discussed in this paper, and pitted against the conventional PoP methods using solder ball connection, as well as the recent developed over-molded interconnection technology. This paper also highlights the advantages of the aforementioned silicon and package interposer technology from electrical performance perspective such as signal integrity in terms of impedance matching, noise shielding, electrical return and insertion losses, of which modeling and simulation data are presented. Other attributes e.g. device input-output (IO) density and physical scalability associated with the above inter-package connection systems are also compared and further elaborated in this paper.
Keywords :
electronics packaging; elemental semiconductors; integrated circuit interconnections; silicon; solders; IO density; PoP technology; Si; impedance matching; input-output density; interpackage connection; noise shielding; over-molded interconnection technology; package interposer technology; package-on-package technology; silicon interposer technology; solder ball connection; Atmospheric modeling; Data models; Insertion loss; Silicon; Solid modeling; Three dimensional displays; Through-silicon vias;
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location :
Lake Buena Vista, FL
Print_ISBN :
978-1-61284-497-8
Electronic_ISBN :
0569-5503
DOI :
10.1109/ECTC.2011.5898572