DocumentCode
1728562
Title
64-bit and multimedia extensions in the PA-RISC 2.0 architecture
Author
Lee, R. ; Huck, J.
Author_Institution
Hewlett-Packard Co., Cupertino, CA, USA
fYear
1996
Firstpage
152
Lastpage
160
Abstract
This paper describes the architectural extensions to the PA-RISC 1.1 architecture to enable 64-bit processing of integers and pointers. It also describes MAX, the Multi-media Acceleration eXtensions which speed up the processing of multimedia and other applications with parallelism at the intra instruction, or subword, level. Other additions to the PA-RISC 2.0 architecture include performance enhancements with respect to memory hierarchy management, branch penalty reduction, and floating-point performance.
Keywords
floating point arithmetic; multimedia systems; performance evaluation; reduced instruction set computing; MAX; Multi-media Acceleration eXtensions; PA-RISC 2.0 architecture; branch penalty reduction; floating-point performance; integers; memory hierarchy management; multimedia extensions; performance enhancements; pointers; Acceleration; Computer architecture; Coprocessors; Memory management; Microcomputers; Multimedia systems; Parallel processing; Reduced instruction set computing; Registers; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Compcon '96. 'Technologies for the Information Superhighway' Digest of Papers
Conference_Location
Santa Clara, CA, USA
ISSN
1063-6390
Print_ISBN
0-8186-7414-8
Type
conf
DOI
10.1109/CMPCON.1996.501762
Filename
501762
Link To Document