Title :
Synchronous DRAM evolutionary changes bring cost/performance advantages in memory systems
Abstract :
SDRAMs are DRAM type products that can offer an evolutionary change with performance advantages for memory systems previously unachievable with traditional DRAMs. These advantages are based on a synchronous I/O interface and improved internal architecture that enables faster data throughput rates. Performance estimations done to compare DRAMs with SDRAMs for various miss ratios and CPU clock/bus clock ratios show significant system performance improvement. With their evolutionary transition SDRAMs are minimizing the risks of system designers. This is an important factor in today´s short product cycle design environment. The significant system performance improvements obtained by these devices are at little or no extra cost. SDRAMs can also keep up with increasing bus speeds narrowing the performance gap between main memory and CPUs. The synchronous I/O, multiple internal banks and high burst modes are bringing SDRAMs closer than ever to CPU performance.
Keywords :
DRAM chips; cache storage; memory architecture; performance evaluation; product development; CPU clock/bus clock ratios; SDRAM; cache; cost performance advantage; data throughput rates; high burst modes; main memory; memory architecture; memory systems; miss ratios; multiple internal banks; product cycle design; synchronous DRAM; synchronous input output interface; system design; system performance; Bandwidth; Clocks; Costs; Microelectronics; Performance analysis; Product design; Random access memory; SDRAM; System performance; Throughput;
Conference_Titel :
Compcon '96. 'Technologies for the Information Superhighway' Digest of Papers
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-7414-8
DOI :
10.1109/CMPCON.1996.501796
