DocumentCode :
1729882
Title :
Substrate bias effects on short channel length and narrow channel width PMOS devices at cryogenic temperatures
Author :
Deen, M.J. ; Wang, J. ; Yan, Z.X. ; Zuo, Z.P.
Author_Institution :
Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
fYear :
1989
Firstpage :
53
Lastpage :
57
Abstract :
The effects of substrate biasing on the characteristics of PMOS devices with varying channel lengths and widths were studied as a function of temperature from 300 K to 77 K. Results on the low field intrinsic mobility, the mobility surface and substrate bias degradation constants, and the effective low field mobility are discussed. The variation of the peak substrate current normalized to the drain current and of drain-induced-barrier-lowering with substrate bias for both groups of devices is also presented and discussed
Keywords :
carrier mobility; cryogenics; insulated gate field effect transistors; semiconductor device testing; 77 to 300 K; PMOS devices; cryogenic temperatures; drain current; drain-induced-barrier-lowering; effective low field mobility; low field intrinsic mobility; mobility surface; narrow channel width; peak substrate current; short channel length; substrate bias degradation constants; substrate biasing; Cryogenics; Degradation; Doping; Integrated circuit interconnections; MOS devices; Rough surfaces; Surface resistance; Surface roughness; Tellurium; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Temperature Semiconductor Electronics, 1989., Proceedings of the Workshop on
Conference_Location :
Burlington, VT
Type :
conf
DOI :
10.1109/LTSE.1989.50181
Filename :
50181
Link To Document :
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