• DocumentCode
    1730311
  • Title

    Vth-Variation Compensation of Multiple-Valued Current-Mode Circuit Using TMR Devices

  • Author

    Hirosaki, Akihiro ; Miura, Masatomo ; Matsumoto, Atsushi ; Hanyu, Takahiro

  • Author_Institution
    Res. Inst. of Electr. Commun., Tohoku Univ., Sendai
  • fYear
    2008
  • Firstpage
    14
  • Lastpage
    19
  • Abstract
    A compensation method against a threshold-voltage (Vth) variation using tunneling magnetoresistive (TMR) devices, is proposed for a deep-submicron VLSI. The influence of the Vth variation in a single MOS transistor can be neglected by adjusting the source voltage of the MOS transistor. The desired circuit behavior is obtained by programming the resistance value of a TMR device which is connected to the MOS transistor in series. By using HSPICE simulation under a 90nm CMOS technology, it is demonstrated that a radix-2 signed-digit adder using the proposed method is robust against the Vth variation.
  • Keywords
    MOSFET; tunnelling magnetoresistance; MOS transistor; TMR; Vth variation; compensation method; multiple-valued current-mode circuit; threshold voltage variation; tunneling magnetoresistive devices; Current mode circuits; Multivalued logic; differential-pair circuit; radix-2 signed-digit adder; reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple Valued Logic, 2008. ISMVL 2008. 38th International Symposium on
  • Conference_Location
    Dallas, TX
  • ISSN
    0195-623X
  • Print_ISBN
    978-0-7695-3155-7
  • Type

    conf

  • DOI
    10.1109/ISMVL.2008.13
  • Filename
    4539395