DocumentCode :
1731161
Title :
Parasitic bipolar impact in 32nm undoped channel Ultra-Thin BOX (UTBOX) and biased ground plane FDSOI high-k/metal gate technology
Author :
Fenouillet-Beranger, C. ; Perreau, P. ; Boulenc, P. ; Tosti, L. ; Barnola, S. ; Andrieu, F. ; Weber, O. ; Beneyton, R. ; Perrot, C. ; de Buttet, C. ; Abbate, F. ; Campidelli, Y. ; Pinzelli, L. ; Gouraud, P. ; Margain, A. ; Peru, S. ; Bourdelle, K.K. ; Ngu
Author_Institution :
CEA-LETI Minatec, Grenoble, France
fYear :
2011
Firstpage :
111
Lastpage :
114
Abstract :
In this paper we explore the impact of the parasitic bipolar in undoped channel Ultra-Thin BOX (UTBOX) with and without Ground Plane (GP) on a 32nm Fully-Depleted SOI (FDSOI) high-k/metal gate technology. The static parasitic bipolar latch occurs at a drain bias superior to the circuit operation alimentation. The several type of ground plane and forward or reverse back biasing don´t modify significantly the bipolar breakdown voltage. The thicker EOT gate oxide is more sensible to parasitic bipolar breakdown. Finally, results have been reinforced by using calibrated TCAD simulation tool.
Keywords :
MOSFET; bipolar transistors; elemental semiconductors; flip-flops; silicon; silicon-on-insulator; FDSOI MOSFET; GP; Si; UTBOX; biased ground plane FDSOI high-k-metal gate technology; bipolar breakdown voltage; calibrated TCAD simulation tool; forward back biasing; fully-depleted SOI; parasitic bipolar transistor; reverse back biasing; size 32 nm; static parasitic bipolar latch; thicker EOT gate oxide; undoped channel ultrathin BOX; Films; Hafnium compounds; Logic gates; MOS devices; Silicon; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2011 Proceedings of the European
Conference_Location :
Helsinki
ISSN :
1930-8876
Print_ISBN :
978-1-4577-0707-0
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2011.6044222
Filename :
6044222
Link To Document :
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