On the use of call admission control and buffer management for congestion control in LAN interconnection over ATM switches

We consider the problem of interconnecting low speed LANs over a high-speed ATM switch. A bottleneck is formed when more than one source originate traffic to the same destination LAN. In this case, congestion may be created at the output gateway (destination LAN interface) and the required services are interrupted. In this paper we propose a new integrated scheme for call admission control (CAC) and buffer management. The objective of the scheme is to prevent the congestion at the destination LANs, as well as within the ATM switch, while minimizing connection rejection rates (maximizing the utilization of the ATM switch). The scheme uses two types of parameters: first, the connection parameters, which are estimated at the network interface unit and specified during connection set-up, and second, the actual traffic characteristics and buffer requirements. The proposed scheme is shown not require intensive computations and can be implemented in real time in a high-speed ATM switch. A simulation model for the system is developed from which the performance of our integrated CAC and buffer management scheme is evaluated. It is shown that the application of our CAC criteria maintains cell/packet dropping to within a same order of magnitude. It is also shown that using virtual buffer allocation, in conjunction with our CAC criteria, results in almost no cell/packet dropping