The study of flat-band voltage shift using arsenic ion-implantation with High-k/Metal Inserted Poly Si gate stacks

Author

Kim, BeomYong ; Ji, YunHyuck ; Lee, SeungMi ; Jeon, BongSeok ; Lee, KeeJeung ; Hong, Kwon ; Park, SungKi

Author_Institution

R&D Div., Hynix Semicond. Inc., Icheon, South Korea

fYear

2011

Firstpage

79

Lastpage

82

Abstract

The origin of flat band voltage shift phenomena using arsenic ion-implant in High-k/Metal Inserted Poly Si (HK/MIPS) gate stacks was investigated. Arsenic ion-implantations were carried out on HfSiO and HfSiON dielectric layers. Precise arsenic profile was obtained through front and backside SIMS analysis. From the electrical and physical analysis, we verified that the flat band voltage was shifted due to an arsenic dipole formation at high-k/metal interface. The negative shift of 480 mV was obtained with the optimized arsenic ion implant condition.

Keywords

arsenic; elemental semiconductors; high-k dielectric thin films; ion implantation; HfSiON; SIMS analysis; arsenic ion-implantation; arsenic profile; dielectric layer; electrical analysis; flat-band voltage shift; high-k/metal inserted poly Si gate stack; physical analysis; Capacitance-voltage characteristics; Implants; Logic gates; MOS capacitors; Nitrogen; Silicon; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference (ESSDERC), 2011 Proceedings of the European

Conference_Location

Helsinki

ISSN

1930-8876

Print_ISBN

978-1-4577-0707-0

Electronic_ISBN

1930-8876

Type

conf

DOI

10.1109/ESSDERC.2011.6044230

Filename

6044230