DocumentCode :
1731768
Title :
Ni-FUSI on high-k as a candidate for 65nm LSTP CMOS
Author :
Kubicek, S. ; Veloso, A. ; Anil, K.G. ; De Gendt, Stefan ; Heyns, M. ; Jurczak, Malgorzata ; Biesemans, S. ; Lauwers, A. ; Hayashi, Shin´ichiro ; Yamamoto, K. ; Mitsuhashi, R. ; Kittl, J.A. ; Dal, M. Yan ; Horii, Shunsuke ; Harada, Y. ; Kubota, M. ; Niwa,
Author_Institution :
IMEC, Leuven, Belgium
fYear :
2005
Firstpage :
99
Lastpage :
100
Abstract :
We show for the first time that full Ni silicidation (Ni-FUSI) of poly gates in combination with Hf based gate dielectrics meets the required device performance for the 65nm LSTP technology node. Important device parameters, like Cinv, mobility and drive currents exhibit significant improvement without compromising the oxide integrity and reliability. The drive of nMOS and pMOS transistors for the VDD=1.1V at 10pA/μm off state leakage is 575μA/ μm and 1650 μA/μm respectively.
Keywords :
CMOS integrated circuits; MOSFET; dielectric materials; hafnium compounds; 65 nm; LSTP CMOS; Ni silicidation; Ni-FUSI; gate dielectrics; high-k dielectric; nMOS transistor; pMOS transistors; CMOS technology; Degradation; Hafnium; High K dielectric materials; High-K gate dielectrics; Implants; Instruments; MOS devices; MOSFETs; Silicidation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2005. (VLSI-TSA-Tech). 2005 IEEE VLSI-TSA International Symposium on
ISSN :
1930-8868
Print_ISBN :
0-7803-9058-X
Type :
conf
DOI :
10.1109/VTSA.2005.1497094
Filename :
1497094
Link To Document :
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