DocumentCode :
1732076
Title :
Common architecture for discrete wavelet transform analysis and synthesis with sequential and constant processing elements
Author :
Cox, Pedro Henrique ; De Carvalho, Aparecido Augusto
Author_Institution :
Departamento de Engenharia Eletrica, Univ. do Estado de Sao Paolo, Brazil
Volume :
1
fYear :
2004
Firstpage :
45
Abstract :
This paper addresses the problem on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC´s and FPGA. The parallel filter architecture for DWT has been improved, calculating wavelength coefficients in real time with hardware reduced to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace constant multipliers. Including series memory register banks, one integrated circuit signal analyzer, ultrasonic range, is presented.
Keywords :
FIR filters; application specific integrated circuits; digital filters; discrete wavelet transforms; field programmable gate arrays; medical signal processing; parallel architectures; ASIC; Booth-Wallace constant multiplier; FPGA; IDWT; Radix-2 multiplier; VHDL; audio range; biological data processing; cardiac beats; constant processing elements; discrete wavelet transform; hardware reduction; integrated circuit signal analyzer; parallel filter architecture; processor clock; real time calculation; sequential processing elements; series memory register banks; ultrasonic range; wavelet coefficients; wavelet signal processing; Circuit analysis; Clocks; Discrete wavelet transforms; Field programmable gate arrays; Filters; Frequency; Hardware; Registers; Wavelet analysis; Wavelet coefficients;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2004. IMTC 04. Proceedings of the 21st IEEE
ISSN :
1091-5281
Print_ISBN :
0-7803-8248-X
Type :
conf
DOI :
10.1109/IMTC.2004.1350991
Filename :
1350991
Link To Document :
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