Title :
Research on VLSI test compression
Author :
Shao, Jingbo ; Ding, Jinfeng ; Li, Yingmei ; Huang, Yuyan ; Wang, Jianhua
Author_Institution :
Coll. of Comput. Sci. & Inf. Eng., Harbin Normal Univ., Harbin, China
Abstract :
This paper explores the recent classic VLSI test compression methods, analyses the characteristics of each methods, make compression among them, the advantages and disadvantages of each proposed approaches are expounded. The main purpose for test compression is to reduce test application time, hardware overhead and test cost. The test compression solutions are mainly based on scan chain, and the X-filling methods are adopted for test compression. Finally this paper outlooks the prospective of VLSI test compression.
Keywords :
VLSI; data compression; integrated circuit testing; VLSI test compression; X-filling methods; hardware overhead reduction; scan chain; test application time reduction; test cost reduction; Automatic test pattern generation; Clocks; Dictionaries; VLSI; scan chain; test application time; test compression;
Conference_Titel :
Computer Science and Network Technology (ICCSNT), 2011 International Conference on
Conference_Location :
Harbin
Print_ISBN :
978-1-4577-1586-0
DOI :
10.1109/ICCSNT.2011.6182016
