Title :
Low depth carry lookahead addition using charge recycling threshold logic
Author :
Celinski, Peter ; Al-Sarawi, Said ; Abbott, Derek ; López, José R.
Author_Institution :
Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
fDate :
6/24/1905 12:00:00 AM
Abstract :
The main result of this paper is the development of a low depth carry lookahead addition technique based on threshold logic. Two such adders are designed using the recently proposed charge recycling threshold logic gate. The adders are shown to have a very low logic depth, and significantly reduced area and power dissipation compared to other dynamic CMOS implementations.
Keywords :
CMOS logic circuits; adders; carry logic; logic gates; threshold logic; CMOS threshold logic gate; carry lookahead adders; charge recycling threshold logic; dynamic CMOS implementation; low depth carry lookahead addition; Adders; Arithmetic; CMOS logic circuits; Consumer electronics; Large-scale systems; Logic design; Logic gates; Power dissipation; Recycling; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1009879
