Title :
Rapid prototyping of reconfigurable coprocessors
Author :
Narasimhan, Nareri ; Srinivasan, Vinoo ; Vootukuru, Madhavi ; Walrath, Jeff ; Govindarajan, Sriram ; Vemuri, Ranga
Author_Institution :
Dept. of ECECS, Cincinnati Univ., OH, USA
Abstract :
We describe the process of hardware-software codesign of a JPEG-like still image compression system. The hardware components are targeted to execute on a reconfigurable hardware coprocessor which communicates with a host computer that executes all the software tasks. Central to our codesign methodology is the usage of software profiling, high-level estimation and synthesis tools. We describe the process of trade-off analysis and hardware task selection in detail. We present detailed experimental results gathered throughout the codesign process
Keywords :
coprocessors; data compression; image coding; logic design; reconfigurable architectures; software prototyping; systems analysis; JPEG-like still image compression system.; hardware components; hardware task selection; hardware-software codesign; high-level estimation; rapid prototyping; reconfigurable coprocessors; software profiling; synthesis tools; trade-off analysis; Coprocessors; Field programmable gate arrays; Hardware; Image coding; Logic arrays; Process design; Prototypes; Random access memory; Read-write memory; Software prototyping;
Conference_Titel :
Application Specific Systems, Architectures and Processors, 1996. ASAP 96. Proceedings of International Conference on
Conference_Location :
Chicago, IL
Print_ISBN :
0-8186-7542-X
DOI :
10.1109/ASAP.1996.542825
