Test Access Mechanism for Multiple Identical Cores

Author

Giles, Grady ; Wang, Jing ; Sehgal, Anuja ; Balakrishnan, Kedarnath J. ; Wingfield, James

Author_Institution

Adv. Micro Devices Austin, Sunnyvale, CA

fYear

2008

Firstpage

1

Lastpage

10

Abstract

A new test access mechanism (TAM) for multiple identical embedded cores is proposed. It exploits the identical nature of the cores and modular pipelined circuitry to provide scalable and flexible capabilities to make tradeoffs between test time and diagnosis over the manufacturing maturity cycle from low-yield initial production to high-yield, high-volume production. The test throughput gains of various configurations of this TAM are analyzed. Forward and reverse protocol translations for core patterns applied with this TAM are described.

Keywords

embedded systems; multiprocessing systems; pipeline processing; forward protocol translations; modular pipelined circuitry; multiple identical embedded cores; reverse protocol translations; test access mechanism; test time; Automatic test pattern generation; Broadcasting; Circuit testing; Fault detection; Flexible manufacturing systems; Microprocessors; Pipeline processing; Production; Throughput; Vehicles;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2008. ITC 2008. IEEE International

Conference_Location

Santa Clara, CA

ISSN

1089-3539

Print_ISBN

978-1-4244-2402-3

Electronic_ISBN

1089-3539

Type

conf

DOI

10.1109/TEST.2008.4700553

Filename

4700553